Conference Agenda

Ceramic materials have long been employed in electronic packaging, particularly in devices designed for harsh environmental conditions such as cryogenic settings. With the escalating technological demands for high-density integration of devices utilized in harsh environments like space, cryogenics, high-temperature, or high-voltage applications—including quantum optoelectronic devices or sensor systems deployed on nanosatellites—novel fabrication solutions are imperative. These solutions must not only prioritize performance and ultra-high fabrication resolutions tailored to demanding applications but also consider factors such as fabrication cost, time, and environmental impact.

Addressing these challenges necessitates the realization of intricate micrometric 3D ceramic structures incorporating sophisticated and densely packed metallic circuits to facilitate high-density integration of microdevices. In this regard, 3D ceramic micrometric interconnect devices emerge as highly promising solutions, minimizing the need for traditional techniques like wire bonding and resins, which often pose technical limitations in harsh environments.

Among the various techniques applied for their realization, the combined additive-subtractive approach of pulse laser microprocessing currently stands out as the singular method encompassing all the prerequisites for their fabrication. Notably, its ultra-high precision within a few microns, both in geometrical configuration and material machining selectivity, enables the creation of intricate interconnect circuits and on-chip component integration within sophisticated 3D designs.

The precise control of laser pulse energy, both temporally and spatially, has enabled selective processing of circuit structures, allowing characterization of their structure, material, surface, and mechanical properties based on laser beam and sequence properties. This integrated approach offers a pathway towards the development of advanced ceramic interconnect devices tailored to meet the stringent requirements of modern electronic applications in extreme environments.

Laser direct structuring (LDS) technology has been developed for application on molded interconnection devices (MIDs). This work aims to provide evidence that a smaller-scale application of LDS technology is feasible for IC packages based on leadframes. Through direct copper interconnection (DCI) technology, it has been demonstrated the possibility to create more flexible, high-performance interconnections that are also able to reduce the size of the package. A UV 355nm wavelength laser has been used to perform laser structuring on the mold, realizing the three main structures necessary for the creation of the interconnection path: the vias on die, the vias on leads, and the traces that connect the two types of vias. In these structures, copper is grown through two plating processes, electroless and electroplating, to achieve the interconnection. To realize die and lead vias, laser parameters have been varied in order to obtain vias with different diameters. A characterization have been performed on vias realized by laser with diameters in the range of 65-100μm for die vias, with a depth of 100μm, and diameters in the range of 225-375μm with a depth of 375μm for lead vias. To investigate the platability, structures with an aspect ratio (bottom vias diameter/depth) less than 1 have also been realized. Vias have been plated with three different plating recipes, each with a different copper thickness target. A visual inspection have been carried out using an optical microscope and SEM to evaluate the quality, geometries and to measure diameters of the structures realized by laser. To prove the correlation between plating process and laser structured vias, with different diameters, cross sections have been performed.

Worldwide microelectronics industry trends indicate increasing miniaturization of electronic devices for their seamless integration into daily life of consumers via wireless technologies, e.g., wearable health monitoring devices, flexible foldable devices, or miniature hearing aids. The miniaturization poses severe design and packaging challenges for the electronic components as the small scale physical phenomena become more significant. The heat generated by the chips and sensors must be dissipated in an efficient manner through optimally designed heat sinks to avoid heavy thermal stress cycles on the components. At the same time, the heat sinks should not interfere with the antenna signals, which requires their appropriate placements on the board. Some devices may require shielding from electric and magnetic fields. Additionally, miniaturized accelerometers suffer from nonlinear squeeze film damping effects, which adds even more complexity to the design requirements. To address these challenges, multiphysics simulations form an integral part of the design process and provide essential insights through multiple iterations to arrive at an optimal design to be manufactured. In this white paper, we present a cloud-based multiphysics simulation tool called Quanscient Allsolve. The tool is based on the finite element method and seamlessly integrates multiple physical processes, such as heat and fluid flow, structural mechanics, electromagnetic waves, electrostatics, magnetism, and many others. These physics can be modeled independently or in a strongly coupled way to perform various types of numerical simulations, such as eigenmode analysis, static and transient analysis, harmonic and multiharmonic analysis. The proprietary algorithms specifically optimized for cloud scaling enable running large-scale simulations as well as multiple of such simulations at the same time to accelerate the design iteration process. Faster design iterations reduce the development times and the time-to-market bringing the product to consumers at the earliest.

Topics: Multiphysics simulation, Numerical modeling, Finite Element Method

Keywords: thermal, mechanical, electromagnetic waves, antennas, magnetism, electrostatics, finite element method, allsolve

Liquid metals of gallium-based alloys have a low melting point and remain in liquid form at room temperature and below. The use of this attribute together with the characteristics of metals has brought revolutionary use in the fields of microfluidics and microelectronics. Abilities such as compliance, resistance to fatigue and allowing for shape morphing while maintaining high electrical and thermal conductivity have opened new opportunities in wearable and implantable electronics, robotics and haptics. The implementation of gallium-based liquid metals as interconnections for pliable printed circuit boards, shape-changing and haptic sensors and devices have been extensively investigated.

The efficient patterning of liquid metals is still the subject of research and optimization. The challenging factor is the combination of low viscosity, very high surface tension, and, under atmospheric conditions, the formation of a thin passivating solid oxide layer (1-3 nm in thickness). This phenomenon is utilized by needle dispensing technology (also known as direct ink writing) for the patterning of planar and 3D objects. The dispensing needle is set in close proximity to the substrate and the surface oxide layer is continuously sheared and reformed, creating a stabilizing shell around the LMA structure during deposition. High demands are therefore placed on the precise proximity control, as well as the evenness and cleanliness of the substrate. The technology enables the patterning of features down to 2 µm in the smallest dimension. However, the technique reaches its limitations in high throughput manufacturing and preferably suits prototyping and smaller-batch production of high-end devices.

Growing interest in personalized remote patient monitoring requires wearable electronic devices with significantly lower production costs, and therefore a more suitable fabrication methodology is essential. Non-contact jet dispensing of solder pastes, conductive adhesives, structural underfills, and sealing materials are common in many fields, including electronics, medtech, automotive and aeronautical industries. The utilization of precision contact-free deposition technology of liquid metals would contribute to overcoming the limiting factors and demands of the aforementioned technique and facilitate the challenges of production requirements. Results concerning determining the feasibility of digital non-contact patterning of liquid metal will be presented. The emphasis is put on optimizing the configuration and jetting performance of liquid metal for the deposition of planar features and interconnects. The process utilizes conventional jet valve dispensing equipment.

Chipless RFID tags can be integrated into electronic circuit carriers as easily and cost-effectively as barcodes, DMC or data matrix codes. The eponymous chiplessness not only avoids assembly work and component costs, but also makes the marking of the assembly available very early on in the manufacturing process. The concept presented here operates at microwave frequencies and is realised in LTCC multilayer technology. The ceramic substrate further extends the operating temperature range. Reading the tag in the near field reduces ambiguities and interference in practical use. In the presented concept, the information is encoded in the frequency domain, where the presence or absence of a null at a distinct frequency corresponds to a binary digit. By employing a wideband dual polarized antenna, the impinging RF signal is received by the tag, processed by a set of resonators used to encode the bits, and finally retransmitted with a 90° polarization rotation. For improving the sensitivity and precision of the code reading, a reference structure can be efficiently applied. The paper presents the concept and realization of the tag, including an analysis and comparison between the numerical and measured results.

OPMMEG project (funded by European Innovation Council, ID 101099379) is aiming to develop the technological elements of optically-pumped magnetometers (OPM) to be utilized in magnetoencephalography (MEG), which is a non-invasive imaging technique for investing human brain functions. MEG operates by detecting magnetic fields naturally produced by the brain, with no applied fields or injections. Typical applications are epilepsy and mild traumatic brain injuries.

OPMs are a cryogen-free quantum sensor technology with extraordinary magnetic sensitivity. In comparison with the currently used SQUID-based MEGs, OPM provides a superior balance of sensitivity, size and proximity to the cortex, but have not yet been implemented in technologies that are simultaneously manufacturable at scale, high-performing, and cost-effective. In this project an OPM array will be developed to meet these requirements for wide-spread use of OPMs in MEG.

The sensor array needs a high-power VCSEL and high-quality miniaturised sensor package. As a final outcome, a helmet with OPM sensors placed close to each other will be demonstrated. The project brings together world leaders in quantum sensor components and systems, commercial MEG systems and MEG applications. OMPMEG will build a value chain from photonic devices to systems connecting all relevant stakeholders. An essential part of this EIC-funded project is to study commercialization aspects of OPMs in MEG and also other applications. The conference presentation will show the status after the 1^st project year.

This paper describes the design of a silicon nanowire-based sensor chip and the optimization of various parameters and recipes, such as photolithography and e-beam deposition. We describe packaging issues with nanometer-thickness metal deposition. The electrical response of the silicon nanowire integrated sensor array was studied by electrical current (IV) analysis. The sensors are designed to detect chemicals and biomolecules, potentially acting as a novel biosensor for biomedical diagnosis in the future.

In space sector, the growing trend towards in digitalization and the demand of ever more compact and integrated devices have led to an ever-increasing interest in SiP Technology that is identified as a key technology for future space equipment. SiP offers the advantage of integrating different functions based on heterogeneous technologies on the same substrate. For instance, SiP technology enables the integration of different functions utilizing various semiconductor processes, allowing for flexibility in combining components such as ADC/DAC with digital routing and processing. This approach also facilitates the reusability of existing intellectual property (IP), resulting in time and cost savings compared to the development of a dedicated System-on-Chip (SoC). Furthermore, SiP technology helps to decrease the power consumption over capacity ratio and increase the compactness of the unit. It offers the ability to enhance capacity while minimizing the size and volume of the function.

In the frame of FOCUSING, a synergic Horizon Europe project between, IMT, Panasonic, Somacis, Thales Alenia Space France, Thales Alenia Space Italy and Hytek, the main objective is to develop innovative SiP building blocks in Europe using state-of-the-art base materials, advanced packaging techniques, and final integration on motherboard. Different systems are being developed and assessed to cover a wide range of applications, including:

• Power supply SiP using embedding technology
• High speed data rate SiP, using complex build-up structure
• High frequency mix RF/ Digital SiP using as well complex build-up structure.

This paper specifically focuses on the development of the high-speed data rate SiP, addressing the architecture tradeoff and chip selection for the SiP demonstrator capable of handling data rates up to 25 GHz

Advanced substrates necessitate a high I/O count to represent complex ASIC dies with up to 10,000 bumps, each with a pitch of 200µm or less. The substrate is characterized by employing complex materials compatible with extremely low dielectric thickness and thin base copper. A substantial number of micro-vias are required to interconnect all dies on a 45x45mm substrate.

A focus will be done on the architecture design of the substrate. The 6+n+6 build-up shall be compatible of the complex dies fan-out exhibiting fine tracks and spaces (25/25µm) and be as much as reliable for space environment constrains. To do so, different stacking architectures have been developed on the same substrate. Initial signal integrity simulations have been done to determine the best electrical architecture (stacked or staggered) to implement. On the other hand, with the benefit of daisy-chain dies, will provide the possibility of testing each structures definition implemented on the test vehicle to highlight the best reliable and functional configuration.

Given that the validation of such a complex substrate is not covered by existing space standards, this paper discusses also the definition of an adapted test flow approach based on space standards. This approach aims to rely on a known test definition but tailored with adapted tests for this technology. The results will be presented as far as they are available.

While demand is growing for electronics, the amount of generated E-waste is a considerable concern [1] regarding sustainability and the environment. Transient electronics [1] and, more generally, biodegradable electronics are the pathways [2] where the current research trends are headed. Transient technology enables electronics to be zero-waste. while being capable of disappearing with minimal or non-traceable remains over stable operation time. Biodegradables are more used as substitutes for rigid alternatives [2].

In this paper, a novel substrate is presented for sustainable microelectronics applications, more specifically, printed circuits. DAT1 is a biodegradable, water-soluble insulating material that can alternatively replace current PCB insulating materials in selected applications. It does not contain metal, microplastic or petroleum derivates. (Certificates are available at [3]). In the paper, we present the process of preparing conductor tracks on the boards with thick-film technology and subtractive laser processing of copper. We investigate the surface roughness, present peel-testing, and basic assembling approaches (based on surface mounting) with low-temperature reflow soldering (LTS with SnBiAg-based alloy, Alpha OM520). We present water adsorption tests with water solubility analysis in ESPEC EHS-211M climatic chamber (25°C, saturated RH).

It was found that conductive patterns can be created on the surface using conventional copper materials and thick-film printing technologies. Components can be joined by conductive adhesive or low-temperature (SnBi) alloys, maximizing profiles at 150-160 °C. DAT1 and Cu foil structures with aqueous surfaces can be pressed together, forming a pre-preg basis. Laser etching of the substrate is achievable. The obtained peel force is currently 0.6-0.7 N/mm, below the accepted value of 1.4 N/mm. Surface roughness was recorded between 0.84 and 1,2 µm. The composition of the substrate surface did not change after the heating of the reflow. Moisture absorption resulted in ~15% after 75 hours. Water degradability was presented qualitatively after 48 hours of degradation in water.

The resulting circuits could be used in low-humidity environments or when the advantage of solubility is required.

[1] Kun Kelvin Fu, Zhengyang Wang, Jiaqi Dai, Marcus Carter, and Liangbing Hu, Transient Electronics: Materials and Devices, Chem. Mater. 2016, 28, 11, 3527–3539 Publication Date: April 28, 2016 https://doi.org/10.1021/acs.chemmater.5b04931

[2] A. Géczy, C. Farkas, R. Kovács, D. Froš, P. Veselý and A. Bonyár, "Biodegradable and Nanocomposite Materials as Printed Circuit Substrates: A Mini-Review," in IEEE Open Journal of Nanotechnology, vol. 3, pp. 182-190, 2022, doi: 10.1109/OJNANO.2022.3221273

[3] Degraway, Certificates, accesed at 2024. 02. 05. https://degraway.com/

Highly crosslinked polymers play a crucial role in protecting sensitive electronics in harsh environments. Therefore, having adequate knowledge of the underlying swelling mechanism is necessary to optimize encapsulation thickness for prolonging the lifespan of highly sensitive electronic devices, such as medical equipment.

The goal of this work is to model the superimposed heat and mass transfer in the encapsulation. The model is based on the PC-SAFT equation of state accounting for the interactions between solvent and polymer [1]. The elastic forces of the polymer chain due to the cross-linking are considered by the elastic contribution [2]. The thermodynamic model is parameterized by gravimetrical measurement of the polymer network swelling. Diffusion is described by the application of the Maxwell-Stefan equation, where the chemical potential serves as the driving force for mass transfer and is calculated using the thermodynamic model. To account for abnormal diffusion behavior, we enhance the Maxwell-Stefan model with the viscoelastic Kelvin-Voigt model consisting of a parallel viscous damper and an elastic spring. The encapsulated electronics are considered as a heat source in the simulation, which is accounted for by introduction of an energy balance. Further, the influence of the non-isothermal temperature field on the diffusion behavior is considered.

Here an approach for the modelling of the diffusion in an electronic device during utilization will be shown and discussed. This approach is capable of accounting for changes in diffusion speed in relation to temperature profiles within the polymer matrix.

• [1] P. Krenn, P. Zimmermann, M. Fischlschweiger & T. Zeiner, J. Chem. Eng. Data 2020, 65, 5677.
• [2] B. Miao, T. A. Vilgis, S. Poggendorf & G. Sadowski, Macromol. Theory Simulations 2010, 414.
• [3] P. Krenn, P. Zimmermann, M. Fischlschweiger & T. Zeiner, J. Mol. Liq. 2021, 116809.

PurPest is an EU funded project (Horizon Europe, grant ID 101060634) that will develop and demonstrate an innovative sensor system prototype (SSP) that can rapidly detect five different pests during import of plant material and in farmer fields to stop establishment of these pests and to reduce pesticide inputs by at least 50%. This approach is based on detecting specific volatile organic compounds (VOCs) that are released by the pests or infested plants at low concentrations (< ppm). Specific detection of low VOC amounts required the development and combination of several miniaturized technologies into a sensor system prototype (SSP), such as pre-concentrators, micro gas chromatograms (µ-GC), electronic nose arrays and surface enhanced Raman spectroscopy (SERS) chips. The project is currently conducting controlled plant experiments to collect and identify the VOCs of interest. Machine learning (ML) and artificial intelligence (AI) will be used to identify any particular VOC patterns that indicate the presence of the target pests. This generated data will then inform the development of the different SSP components, such as pre-concentrators, µ-GC retention layers and sensor coatings. The SSP will require innovative packaging solutions to include several types of sensors. Moreover, the project targets collaborating with other sensor projects, like newly granted EU project, COMPAS. In order to facilitate this interaction, a certain level of standardization for connection of the sensors and electronics will be necessary. The current paper presents a short update on application of coatings and the overall packaging and integration concepts of the SSP. The PurPest project is conducted by a consortium of 18 partners from 10 European countries, with eight universities, six research institutes and four highly innovative SMEs. The project started in January 2023 and will last for 48 months. The website is www.purpest.eu .

The advancement of hybrid integration technology for smaller electronics and photonics systems is exerting increased pressure on the development of new automated processes that enable reliable integration with high throughput. Simultaneously, the integration density and diversity of components in a package, including Micro-Electro-Mechanical Systems (MEMS), wafer-level optics, alongside photonics and III/V optoelectronics, are also on the rise.

To address these evolving needs, a novel integration approach based on laser-assisted bonding (LAB) is presented here. The developed LAB setup employs an original bottom illumination/irradiation architecture, coupled with simultaneous imaging through silicon, facilitating high-precision alignment for photonics waveguides. Moreover, the Automated Power Control of a LAB process enables overheat protection for the bonded surfaces, thereby enhancing the reliability and repeatability of the integration process.

In a practical demonstration, we showcase the effectiveness of the LAB process by applying it to integrate a multichannel 1x1mm III/V chip with a silicon photonic integrated circuit. The application of highly localized heat during the LAB process rapidly elevated the temperature of the photonic circuit above the pre-deposited solder layers' melting point. This, in turn, led to successful bond formation with impedance in the range of hundredths of an Ohm, accompanied by negligible thermal-induced stress to the bonded surfaces and minimal warpage.

These results not only validate the efficacy of the LAB process but also underscore its potential to push the boundaries of photonic integration. Particularly noteworthy is the rapid and energy-effective LAB process, featuring bottom illumination/irradiation and simultaneous through-silicon imaging. Thus, it facilitates bonding and active waveguide alignment—an essential aspect in achieving effective integration in the field of photonics. The obtained results contribute to advancing our photonic integration technology.

In the past couple of decades, optical coherence tomography (OCT) and photoacoustic imaging (PAI) have been developed and applied widely in biomedical and clinical research. Based on the interference of back-scattered light, OCT can reconstruct the sample in 3D with high resolution and high speed. Alternatively, PAI is a non-invasive modality that combines optical excitation and ultrasonic detection. It can be used to visualize absorption differences in tissues to construct the 3D images. In this work, we report on an assembly of a novel optical ultrasound detector for PAI. The sensor consists of an integrated optical micro-ring resonator (MRR) whose input and output waveguides are interfaced with optical fibers. These fibers are attached to specially developed miniature fiber holders which enable automated manipulation and firm attachment of the fibers to the waveguides. The sensor's application is related to the EU Horizon 2020 project REAP (www.projectreap.eu) as a part of development of versatile bioimaging platform focused on investigating drug-tolerant persister cancer cells. The compact dimensions and precision (fiber alignment with an accuracy of up to 0.1 um) of this device added a layer of intricacy to the undertaking.

The entire process of the device assembly is carried out at an automated station (from Ficontec) for micro-positioning, active/passive precision alignment, attachment via welding, soldering, bonding, and automated optical inspection. This station gives us several significant advantages, such as positioning accuracy, assembly time and reliability. The fiber folders comprise of U-grooved pieces of fused silica. Size of these chips can be selected from 1x1 mm2 to 3x2 mm2 with one or more grooves for fibers in the middle. Fibers can at first be attached and glued in the grooves of the holder. The holder can then be gripped and manipulated with an automated assembly station and aligned with the waveguides. Depending on the selected fiber the alignment tolerance is < 1 um. The progress of alignment is monitored by optical power through the waveguide. On the conference we shall report the achieved coupling loss, demonstrate the finished sensor device, and introduce our approach with a video of the precise alignment process.

COMPAS is an EU funded project (Grant ID 101135796) which main objective is to develop a compact, inexpensive and ultrasensitive photonic integrated circuit (PIC) sensing platform (PSP) for air and water monitoring, relying on the co-integration of light source, detectors and electronic IC for on-chip signal processing.

The sensing principle will rely on optical waveguide interferometers coated with optically active selective sensing layers. When a target molecule attaches to the sensing layer, the refractive index of that layer will change causing a slight phase shift in one of the modes of light. When the two modes rejoin, this change will be detected as an intensity change of the light passing through the waveguide.

A baseline PSP will rely on advanced assembly and packaging of individual components by PHIX, Europe's leading optical packaging supplier. The components, laser diode, waveguide chip and photodetectors will be assembled onto a submount. This will require high precision assembly in two directions (x and z) and require careful optical coupling.

An integrated variant of the PSP will also be developed. In this variant SINTEF will develop and process silicon wafers with integrated photodetectors, onto which they will also fabricate the optical waveguides. This allows for high accuracy alignment between these components. A laser diode light source, developed and produced by Lancaster University, will be flip chip mounted on the other end of the wave guide. Meta-surfaces on the top of the waveguides will increase the orthogonal light coupling needed.

The project will develop novel micro fluidic solutions to feed the sensing surfaces with liquid or gas in a controlled manner. The readout and analysis of the optical signal will be done by a novel analogue electronics concept developed by Oliveris.

This paper will go through the challenges and proposed solutions of the COMPAS PSP.