IEEE ESTC 2024
September 11–13, 2024 | Berlin, Germany
Conference Agenda
Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).
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Session Overview | |
Location: MOA 3 MOA 3 |
Date: Wednesday, 11/Sept/2024 | |
8:30am - 10:30am |
PDC: “Flip Chip Fabrication and Applications“ I Location: MOA 3 Course instructor: Eric Perfecto |
10:45am - 12:45pm |
PDC: “Flip Chip Fabrication and Applications“ II Location: MOA 3 Course instructor: Eric Perfecto |
2:40pm - 3:55pm |
DTM1_Co-design and Modeling for Chiplets Location: MOA 3 Chair: Chris Bailey, Arizona State University Simulations of Wafer-to-wafer Bonding Dynamics and Deformation Mechanisms 3:05pm - 3:30pm Signal Integrity Optimization for CoWoS Chiplet Interconnection Design Assisted by Reinforcement Learning 3:30pm - 3:55pm Finite Element Analysis of Stress Variation of Hybrid Bonding During Miniaturization of Interconnects |
5:00pm - 6:15pm |
DTM2_Reduced Order Modeling for Advanced Packaging Location: MOA 3 Chair: Kshitij Anil Kolas, Fraunhofer ENAS Reduced-Order Modelling for Coupled Thermal-Mechanical Analysis and Reliability Assessments of Power Electronic Modules with Nonlinear Material Behaviours 5:25pm - 5:50pm Highly Efficient Modeling of Solder Balls and Their Visco-plastic Behavior Applying the Energy Conserving Sampling and Weighting Method 5:50pm - 6:15pm Coupled Electrothermal Analysis with Reduced Order Models for Optimizing GaN HEMTs Performance in Traction Inverters |
Date: Thursday, 12/Sept/2024 | |
9:15am - 10:30am |
DTM3_Reliability and Virtual Prototyping Location: MOA 3 Chair: Pradeep Lall, Auburn University Reliability Testing and Virtual Prototyping for Embedded GaN Power Modules in Automotive Applications 9:40am - 10:05am Fully Connected Neural Network (FCNN) Based Validation Framework for FEA Post Processing to improve SAC Solder Reliability Analysis 10:05am - 10:30am Re-Integrating a Reduced-Order Model into Finite Element Environment for Thermo-Mechanical Reliability Analysis in Microelectronics |
11:00am - 12:15pm |
DTM4_Device Level Modeling Location: MOA 3 Chair: Przemyslaw Gromala, Robert Bosch GmbH Latency Insertion Method for FinFET Simulation Incorporating Parasitic Source/Drain Resistances 11:25am - 11:50am CANCELLED: Adaptive Artificial Neural Networks for Power Loss Prediction in SiC MOSFETs 11:50am - 12:15pm Simulation Analysis on Thermal Performance of Lidless Fan-out Package |
1:45pm - 3:15pm |
Special Session Location: MOA 3 PUNCH - Photonic Packaging |
3:45pm - 5:15pm |
Special Session Location: MOA 3 Chair: Toni Mattila, Business Finland Quantum Computing |
Date: Friday, 13/Sept/2024 | |
9:15am - 10:30am |
Flex1_Reliability Assessment of Flexible Electronics Location: MOA 3 Chair: Jean Charles Souriau, CEA-Leti Development and Reliability Assessment of a Flexible Printed Capacitive Sensor for Precise Twisting Movement Detection 9:40am - 10:05am Reliability Assessment of Temperature Sensors Integrated on Elastic Substrate 10:05am - 10:30am Comparison of Electrical and Mechanical Properties of Stretchable Circuit Boards |
11:00am - 12:15pm |
Flex2_Formation of a Conductive Interconnection for Flexible Electronics Location: MOA 3 Chair: Jukka Hast, VTT Technical Research Centre of Finland ltd. Additively Manufactured Flexible Electronics with Selectively Soldered Surface-mounted Devices Utilising StarJet Technology 11:25am - 11:50am Electroless Nickel/Immersion Gold and Immersion Tin as Final Finish Solutions for Flexible Substrates in EV Batteries 11:50am - 12:15pm Electrical Characterization of an ALPIDE Chip TAB Bonded with Flexible PCBs |
1:45pm - 3:00pm |
RF2_Embedded System-in-Package and Interconnections Technologies Location: MOA 3 Chair: Maurizio Cirillo, Rheinmetall Italia SpA Integration of Microwave SMD Components into Organic Multilayer PCBs 2:10pm - 2:35pm Integration of III-V Components of 5G Transceiver in Embedding PCB-based Technology 2:35pm - 3:00pm Passive Intermodulation Estimation of a Novel Printed Circuit Board Interconnection Technology Based on Static I-V |
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