Core operations in database systems are based on sorting, e.g., creating a new b-tree index, merge joins, or grouped aggregations. The required comparisons can be costly due to many or large columns. In order to reuse previous comparison effort, it can be encoded in form of offset-value codes. While hash values can guarantee that two keys are not equal, offset-value codes can also guarantee equality of key and indicate their sort order, making them usable in sorting algorithms.

Modern CPUs provide specialized functional units that enable data parallel execution within a single core. In this paper, we report on our initial experiences and measurements for comparisons using SIMD instructions. Our techniques are portable to many architectures based on architecture-agnostic vector types and instructions. Our results demonstrate that hardware-accelerated sorting and merging are available on any CPU with SIMD instructions, i.e., practically any modern CPU.

Disruptive memory technology development leads to a wide landscape of novel memory

properties. Specifically, with the possibility to utilize multiple write modes for the tradeoff of energy

consumption and retention time, the system software and applications can optimize the energy

consumption of the memory while ensuring guarantees for memory retention. Deriving online and

offline strategies for such optimization requires precise simulation of memory write modes across the

memory area. This paper enables the simulation of such write-mode fragmentation for the NVMain2.0

simulator in a static and dynamic configuration fashion.

Non-volatile memory (NVM) introduces a new class within the traditional storage hierarchy, combining attributes of both primary and secondary storage. These technologies offer latency approaching that of DRAM, though slightly higher\footnote{NVM technologies such as MRAM~\cite{slaughter2002fundamentals}, PCM~\cite{fong2017phase}, and RRAM~\cite{chen2020reram} each have distinct latencies.}, and significantly lower than traditional block storage devices. NVM is byte-addressable and provides persistence. Integrating NVM into various database and file systems has been the focus of extensive research. Efforts have centered on optimizing data structures like B-trees and LSM-trees, as well as enhancing components such as logging and recovery. However, a unified storage engine specifically designed to study the characteristics of the modern storage landscape, effectively utilizing and managing the potential of diverse memory and storage devices, does not currently exist. This work involves extending Haura, a general-purpose storage engine, to explore the benefits of the modern storage landscape. By integrating NVM into its storage stack, we aim to optimize data structures to leverage NVM's potential and employ compression techniques to minimize the memory footprint. This research is still in progress. However, the initial experiments integrating NVM into Haura demonstrated its strengths under sequential workloads and sensitivity to block sizes. Further modifications enable zero-copy deserialization and granular key-value access, fully leveraging NVM's byte-addressable characteristics.